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Signatec Releases PX1500-4, Its 4-Channel, 1.5 GHz Per Channel / 2-Channel, 3 GHz Per Channel PCI-Express Digitizer with Two Virtex-5 FPGAs
Date:12/18/2009

By relying on the Virtex-5 FPGA family to deliver embedded processing and serial transceiver capabilities, combined with Signatec’s growing suite of development libraries for FPGA programming, Signatec’s PX1500-4 offers exceptional value for engineers in the aerospace, defense and intelligence communities.”

Precise Sampling Rate Flexibility

Beyond its high-speed, multi-channel performance capabilities, the PX1500-4’s frequency synthesized clock allows the ADC sampling rate to be set to virtually any value from 200 MHz, the minimum allowable ADC clock, up to 1500 MHz, offering maximum flexibility for sampling rate selection. Additional divide-by-2 circuits are provided for sampling at even lower frequencies. This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock. The ADC may also be clocked from an external clock source.

This level of accurate clock tuning without sacrificing performance gives the best integrated onboard ADC clock flexibility in the industry. Users no longer need to settle for fixed clocks or limiting divide-by-2 clocks only. This feature is ideal for undersampling applications, where the Nyquist bands need to be perfectly tuned to optimally place the center frequency of the sampled signal into the middle of the Nyquist zone and to optimize for the total bandwidth or data captured. In addition to the onboard clock capabilities, the ADC may also be clocked from an external clock source.

Up to three PX1500-4 boards may be interconnected in a Master/Slave configuration via a ribbon cable that connects at the top of the board. In this configuration the clock and trigger signals from the Master drive the Slave boards so that data sampling on all boards occurs simultaneously. Up to six boards can be set up for fully synchronized operatio
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Source: PRWeb
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